In control systems such as switching power supplies, servo loops and robotic controllers, error detection is the first step before the control loop can execute other functions. The resultant error signal, after shaping with a loop filter, feeds the controlling function of the loop for error correction. Subsequently, the error-corrected signal is fed back to the error detector for further minimization of any residual error. This recursive action exhibits loop latency that reduces the system phase and gain margins. Poor phase and gain margins impair the loop transient and quiescent responses, so loop latency should be minimized in order to achieve good performance.
Digital control loops offer many advantages over the analog counterparts, such as exceptional stability and programmability. However, those digital control loops generally demand power and circuit parallelism to minimize loop latency. Consequently many low power digital designs never perform as well as analog loops due to long pipeline delays within the loop.
There is, therefore, a need in the art for an adaptive timing technique to minimize latency in digital control loops.